基于單片機(jī)的紅外監(jiān)測報(bào)警系統(tǒng)的設(shè)計(jì)—本科-資料下載頁

【導(dǎo)讀】紅外線是一種光線，是太陽光線中眾多不可見光線中的一種，具有普通光的性質(zhì)，紅外線由德國科學(xué)家霍胥爾于1800年發(fā)現(xiàn)，又稱為紅外熱輻射。中紅外線，波長為～；遠(yuǎn)紅外線，波長為～1000pm之間。又稱紅外防盜報(bào)警器，作為一種新的技術(shù)，它已越來越得到社會各界的重視和廣泛應(yīng)用。紅外入侵報(bào)警器按其探測手段的不同，可分為被動式、主動式和多技術(shù)復(fù)合入侵報(bào)警器。器，由光學(xué)系統(tǒng)，紅外傳感器和信息處理三部分組成。目前與紅外傳感器配套的光學(xué)系。反射式系統(tǒng)的紅外傳感器要置于鏡前，體積大，不好密封，在防。當(dāng)警戒區(qū)內(nèi)無盜賊出現(xiàn)時，紅外輻射場處于穩(wěn)定狀態(tài)，紅外傳感器無信。當(dāng)盜賊出現(xiàn)在警戒區(qū)時，紅外輻射場發(fā)生變化，這種變化立即被經(jīng)過巧妙設(shè)計(jì)。的多視場組合菲涅爾透鏡會聚，敏感的紅外傳感器接收后迅速將這種變化轉(zhuǎn)為電信號，于是發(fā)出報(bào)警，示出事發(fā)地區(qū)。警系統(tǒng)展開應(yīng)用研究工作。目前大部分生產(chǎn)基地采取了防護(hù)圍墻、24小時值班、定期巡邏等人。動監(jiān)測和報(bào)警成為可能。

　　

【正文】 // 紅外監(jiān)測 4 CLR EX11: MOV R3,04H EX12: MOV R2,32H CLR EX13: CLR LCALL DELAY1 SETB LCALL DELAY1 DJNZ R2,EX13 SETB SETB LCALL DELAY2 DJNZ R3,EX12 MOV R0,20H SETB TR1 LCALL DELAY DJNZ R1,EX11 MOV R1,03H SETB LJMP DONE ORG 2021H DELAY: JB TF1,LOOP1 // 延時程序 AJMP DELAY LOOP1: MOV TH1,0BH MOV TL1,0DCH CLR TF1 DJNZ R0,DELAY CLR TR1 RET DELAY1: MOV R7,14H DY1: MOV R6,7DH 附錄 B 41 DY2: DJNZ R6,DY2 DJNZ R7,DY1 RET DELAY2: MOV R7,05H DY3: MOV R6,0C8H DY4: MOV R5,7DH DY5: DJNZ R5,DY5 DJNZ R6,DY4 DJNZ R7,DY3 RET END 基于單片機(jī)的紅外監(jiān)測與報(bào)警設(shè)計(jì)與實(shí)現(xiàn) 42 附錄 C The General Situation of AT89C51 Chapter 1 The application of AT89C51 Abstract: Microcontrollers are used in a multitude of mercial applications such as modems, motorcontrol systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such highspeed eventbased applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the ponent and at the system level. The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bittimer/counters, a five vector twolevel interrupt architecture, a full duple serial port, onchip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC: Supply voltage. GND: Ground. Port 0: Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. Port 1: Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the loworder address bytes during Flash programming and verification. Port 2: Port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses (MOVX@DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to 附錄 C 43 external data memory that use 8bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3: Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below. Figure 121Block Diagram 基于單片機(jī)的紅外監(jiān)測與報(bào)警設(shè)計(jì)與實(shí)現(xiàn) 44 RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG: Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode. PSEN: Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except t